Control bus

In computer architecture, A control bus is (part of) a computer bus, used by CPUs for communicating with other devices within the computer. While the address bus carries the information on which device the CPU is communicating with and the data bus carries the actual data being processed, the control bus carries commands from the CPU and returns status signals from the devices. For example, if the data is being read or written to the device the appropriate line (read or write) will be active (logic one).

Lines

The number and type of lines in a control bus varies but there are basic lines common to all microprocessors, such as:

• Read (). A single line that when active (logic zero) indicates the device is being read by the CPU.
• Write (). A single line that when active (logic zero) indicates the device is being written by the CPU.
• Byte enable (). A group of lines that indicate the size of the data (8, 16, 32, 64 bytes).

Additional lines are microprocessor-dependent, such as:

• Transfer ACK ("acknowledgement"). Delivers information that the data was acknowledged (read) by the device.
• Bus request. Indicates a device is requesting the use of the (data) bus.
• Bus grant. Indicates the CPU has granted access to the bus.
• Interrupt request. A device with lower priority is requesting access to the CPU.
• Clock signals. The signal on this line is used to synchronize data between the CPU and a device.
• Reset. If this line is active, the CPU will perform a hard reboot.

See also

• Address bus
• Cache bus
• Data bus
• Bus mastering

External links

• Definition by Webopedia.
• Computer system organization at the University of California, Riverside.
• "Hardware and Software Architecture", a PowerPoint presentation at California State University, Los Angeles.

Technical and de facto standards for wired computer buses
General	System bus Front-side bus Back-side bus Daisy chain Control bus Address bus Bus contention Network on a chip Plug and play List of bus bandwidths
Standards	SS-50 bus S-100 bus Unibus VAXBI MBus STD Bus SMBus Q-Bus Europe Card Bus ISA STEbus Zorro II Zorro III CAMAC FASTBUS LPC HP Precision Bus EISA VME VXI VXS NuBus TURBOchannel MCA SBus VLB PCI PXI HP GSC bus InfiniBand UPA PCI Extended (PCI-X) AGP PCI Express (PCIe) Direct Media Interface (DMI) RapidIO Intel QuickPath Interconnect HyperTransport
Storage	ST-506 ESDI SMD Parallel ATA (PATA) SSA DSSI HIPPI Serial ATA (SATA) eSATA eSATAp mSATA SCSI Parallel SCSI SAS Fibre Channel SATA Express M.2
Peripheral	Apple Desktop Bus HIL MIDI Multibus RS-232 RS-422 RS-423 RS-485 DMX512-A IEEE-488 (GPIB) IEEE-1284 (parallel port) UNI/O ACCESS.bus 1-Wire D²B I²C SPI Parallel SCSI Profibus USB IEEE 1394 (FireWire) Camera Link External PCIe Thunderbolt
Audio	ADAT Lightpipe AES3 Intel HD Audio I²S MADI McASP S/PDIF TOSLINK
Portable	PC Card ExpressCard
Embedded	Multidrop bus CoreConnect AMBA Wishbone
Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest. Category