Hardware acceleration

In computing, hardware acceleration is the use of computer hardware to perform some functions more efficiently than is possible in software running on a more general-purpose CPU. Examples of hardware acceleration include blitting acceleration functionality in graphics processing units (GPUs) and regular expression hardware acceleration for spam control in the server industry.[1]

Traditionally, processors were sequential (instructions are executed one by one), and are designed to run general purpose algorithms controlled by instruction fetch (for example moving temporary results to and from a register file). Hardware accelerators improve the execution of a specific algorithm by allowing greater concurrency, having specific data-paths for its temporary values, and possibly reducing the overhead of instruction control. Modern processors are multi-core and often feature parallel SIMD units; however hardware acceleration still yields benefits.

Hardware acceleration is suitable for any repetitive, intensive key algorithm. Depending upon granularity, hardware acceleration can vary from a small functional unit, to a large functional block (like motion estimation in MPEG-2).

The hardware that performs the acceleration, when in a separate unit from the CPU, is referred to as a hardware accelerator, or often more specifically as a 3D accelerator, cryptographic accelerator, etc. Those terms, however, are older and have been replaced with less descriptive terms like video card or network adapter.

In the hierarchy of general-purpose processors such as CPUs, more specialized processors such as GPUs, fixed-function implemented on FPGAs, and fixed-function implemented on ASICs; there is a tradeoff between flexibility and efficiency, with efficiency increasing by orders of magnitude when any given application is implemented higher up that hierarchy.[2][3]

Examples

See also

References

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